The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 17, 1996

Filed:

Mar. 10, 1992
Applicant:
Inventors:

Masashi Suenaga, Hitachi, JP;

Nobuo Tomita, Hitachi, JP;

Hiroshi Watanabe, Hitachi, JP;

Masayuki Tanji, Hitachi, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395287 ; 395181 ; 395299 ; 364D / ; 364230 ; 3642301 ; 364240 ; 3642426 ; 3642427 ;
Abstract

A high-speed information processing in the information processing unit having a multiplexed bus is provided. A unit having a bus grant is stored in the next lowest priority unit memory circuits, and in the next bus arbitration cycle, bus arbitration is carried out by setting the lowest priority to the unit stored in the next lowest priority unit memory circuits. When a fault occurs in one of a plurality of buses and then the faulty bus recovered a normal operation status, the bus status supervising circuits output has fault recovery detecting signals and match the memory contents of the next lowest priority unit memory circuits together. With the above arrangement, an average bus waiting time can be minimized and the bus waiting time can be limited.


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