Automated safestore stack generation and recovery in a fault tolerant

Abstract

In order to gather, store temporarily and efficiently deliver (if needed) safestore information in a fault tolerant central processing unit having data manipulation circuitry including a plurality of software visible registers, a shadow set of the software visible registers are used in conjunction with shadowing and packing circuitry for copying the contents of the software visible registers, after a data manipulation operation, into the shadow set after the validity of such contents have been verified. In the event of a detected fault in a data manipulation operation, the contents of the shadow set, which will be the last valid set immediately before the error was detected, are transferred back to the software visible registers to institute recovery at the point in the data manipulation immediately prior to that at which the error was detected. Preferably, packing circuitry is included to pack half-word (or shorter) register information into full words in the shadow set to minimize the number of shadow registers and support circuitry required. In the preferred embodiment, during the recovery process, the safestore information in the shadow set is routed through a cache memory which is normally in direct contact with the working register set such that minimum special circuitry is necessary to restore the contents of the working registers. The speed of recovery is enhanced by the use of double word transfers between the shadow set and the software visible working registers via the cache memory.