The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 10, 1996
Filed:
Apr. 04, 1994
Masashi Tsubota, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
A microprocessor which has bus cycles of a memory access operation, an I/O access operation, and an idle state, includes a register for storing the number of the idle states to be inserted when first and second I/O accesses are consecutively executed, and a counter circuit for counting a clock when the first I/O access has been executed. A resetting circuit receives a signal indicating that the last access is the I/O access and resets the counter circuit when the first I/O access has been executed, and a comparator compares an output of the register with an output of the counter circuit for generating a recovery end signal when coincidence is detected. A timing generator generates state signals to the effect that the second I/O access is not executed until the recovery end signal is generated. With the inventive configuration, in the case of consecutive I/O accesses, after completion of a first I/O access, the idle state, in which no bus access is executed, is repeatedly inserted, with the number of idle states being inserted being counted by the counting circuit. The number of repeated idle states counted by the counting circuit is compared with the value stored in the memory and, when coincidence is detected, the recovery end signal is outputted so that a next I/O access is started.