The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 03, 1996

Filed:

Jul. 11, 1994
Applicant:
Inventor:

Chih-Liang Chen, Briarcliff Manor, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
327202 ; 327199 ; 327203 ; 327211 ;
Abstract

A device which includes a plurality of master/slave stages, each master/slave stage includes a master segment and at least one slave segment. Each master segment (excluding the one including a first master/slave stage) may be actuated by either external logic during normal operation, or by the output of a preceding slave segment during a scan operation. A continuous single phase clock provides clocked signals to a scan port, as well as the master segment and the slave segment in each of said master/slave stages. A control portion deactivates logic applied to the master segments, and actuates logic applied from the scan port to said master segments during all scan enable periods. The control portion also deactivates the scan port from the master segment, and activates the logic output to the master segments during all normal operation periods.


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