Acoustic charge transport integrated circuit process

Abstract

A process for fabricating an acoustic charge transport (ACT) integrated circuit, comprises the steps of providing a semi-insulating wafer; providing an epitaxial layer with a thickness and carrier concentration appropriate for an ACT device on the semi-insulating wafer; providing at least one circuit element semiconductor layer on the surface of the epitaxial layer for construction of an integrated circuit element, the at least one semiconductor layer having a thickness substantially less than the thickness of the ACT epitaxial layer and having a carrier concentration substantially greater than the ACT epitaxial layer; removing lateral conductivity of the entire ACT epitaxial layer except in the regions associated with the at least one circuit element semiconductor layer and the ACT device in order to achieve lateral electrical isolation between the circuit element semiconductor layer and the ACT device; providing ohmic contacts on the at least one layer and on the ACT device; providing a first metal layer on selected areas on the at least one layer and the ACT device; rendering semi-insulating the epitaxial layer underneath the at least one layer to provide significant vertical electrical isolation with minimal detrimental effect on the electrical characteristics of the circuit element to be constructed on the semiconductor layer; and providing at least one layer of dielectric material on the wafer; and providing at least a second metal layer connected at selected areas to the first metal layer.