The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 03, 1996
Filed:
Jan. 23, 1995
Hisashi Nemoto, Tokyo, JP;
Shinon Denkisangyo Kabushiki-Kaisha, Tokyo, JP;
Abstract
A tray for housing semiconductor devices of a ball grid type, each having a surface provided with a plurality of wiring solder balls, the surface of each of the semiconductor devices having peripheral edges, and each of the wiring solder balls having a diameter, includes a tray surface, and pockets formed in the tray surface, each pocket having corners and a shape similar to and slightly larger than the surface of each semiconductor device. Each pocket has a bottom surface forming a depression and having a shape similar to and slightly smaller than the surface of each of the semiconductor devices and a depth larger than the diameter of each wiring solder ball. Each of ribs has a root formed on each corner of each pocket for dividing the pockets from each other and each having a width gradually increasing toward the bottom surface of each pocket. Supporting step portion is formed between the roots of the ribs and the depressions for supporting corresponding ones of the peripheral edges of the surface of each semiconductor device. Each supporting step portion has an inner wall constituting an inner wall of the depression. Projections are formed in the inner wall of the depression for receiving the solder balls which are disposed outermost of the wiring solder balls.