The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 1996

Filed:

Jan. 28, 1993
Applicant:
Inventors:

Kinji Mori, Tokyo, JP;

Masayuki Orimo, Kawasaki, JP;

Hirokazu Kasashima, Hitachi, JP;

K H Kim, Irvine, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395800 ; 39518209 ; 3642306 ; 364260 ; 3642683 ; 364D / ;
Abstract

A method for organizing and programming distributed computer systems in which processors are connected via interconnection or communication networks, such that even if many cases of hardware and software faults occur within the processors or within the networks, such faults do not lead to the failures in the application's computation. Parallel and asynchronous execution of multiple versions of a program module is performed with processors which are connected by a network without involving any direct interaction between the processors during the execution of the same or different versions of the program module. The process includes a step for executing, for each of the distributed program modules, the primary version and its backup version concurrently by use of multiple processors, a step for checking, in each processor, the logical acceptability of the output data produced from its execution of a program module version, a step for sending, in each processor, the acceptable output data to the transmission paths, a step for receiving, in each processor, the message from the transmission paths, checking the logical acceptability of each received message, and detecting the messages belonging to the same program module, and a step for selecting, in each processor, a message based on a selection logic.


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