The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 20, 1996
Filed:
Mar. 03, 1994
Yasutaka Kohno, Itami, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
A high power output semiconductor device having a plurality of FET elements on a semi-insulating semiconductor substrate including a first conductivity type semiconductor layer on the semi-insulating semiconductor substrate, a plurality of source and drain electrodes alternatingly arranged on the semiconductor layer, a plurality of gate electrodes respectively disposed in gate recesses formed by etching respective surface regions of the semiconductor layer between each adjacent source and drain electrodes. The gate recess has a asymmetrical two-stage recess structure having a second bottom surface only at the source side of the recess at a depth between a first bottom surface in contact with the gate electrode and the upper surface of the semiconductor layer and is not in contact with the gate electrode. Therefore, the thickness of the active layer at the source side is increased as compared with that in the one-stage recess structure, with the result that the source resistance is reduced because of an increase in the thickness of the active layer at the source side region while avoiding deterioration of the gate drain breakdown voltage due to an increase in the thickness of the active layer at the drain side region.