The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 1996

Filed:

Nov. 15, 1993
Applicant:
Inventors:

John D Kenny, Sunnyvale, CA (US);

Min S Ma, Sunnyvale, CA (US);

Assignee:

Cirrus Logic, Inc., Fremont, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ; H03K / ;
U.S. Cl.
CPC ...
327230 ; 327227 ; 327176 ; 327198 ;
Abstract

A NAPNOP circuit for decreasing energy consumption of all or a portion of a microprocessor based system which includes a delay circuit for inhibiting or slowing the output of the system clock pulses for a variable length of time equal to a multiple of N clock pulses where N is a positive integer. The NAPNOP circuit has an input element for inputting a STARTNAP signal which begins a nap period during which the system clock pulses are inhibited or slowed, a clock input device for providing a plurality of selectable clock pulses as inputs to the delay circuit for controlling the operation of the computer system, and a gate element for terminating the nap period.


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