The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 1996

Filed:

Aug. 30, 1995
Applicant:
Inventors:

Tadashi Nukui, Kanagawa-ken, JP;

Ken Tanabe, Kanagawa-ken, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F / ; G01R / ;
U.S. Cl.
CPC ...
323313 ; 324142 ;
Abstract

A power source device including, a primary reference voltage generating device having a positive power source terminal connected to receive one of ground potential and a DC positive voltage and a negative power source terminal connected to receive a primary DC negative voltage for generating a primary reference voltage, a reference voltage generating device having a positive power source terminal connected to receive the DC positive voltage and a negative power source terminal connected to receive the primary reference voltage for generating a reference voltage, a positive voltage generating device for obtaining a difference between the reference voltage and the primary reference voltage and amplifying the difference to generate the DC positive voltage, a negative voltage generating device for inverting amplifying the DC positive voltage to generate a negative DC voltage, and an integrated circuit having a positive power source terminal connected to receive the DC positive voltage and a negative power source terminal connected to receive the DC negative voltage. The integrated circuit and the reference voltage generating device are integrated and formed on a n-type substrate, and the negative power source terminal of the integrated circuit is isolated from the negative power source terminal of the reference voltage generating device.


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