The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 1996

Filed:

Dec. 09, 1994
Applicant:
Inventors:

Nader Amini, Boca Raton, FL (US);

Bechara F Boury, Boca Raton, FL (US);

Sherwood Brannon, Boca Raton, FL (US);

Richard L Horne, Boynton Beach, FL (US);

Terence J Lohman, Boca Raton, FL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ; G06F / ;
U.S. Cl.
CPC ...
395481 ; 395288 ; 395296 ; 395303 ; 395485 ; 395728 ; 395848 ; 395860 ; 3642428 ; 36424292 ; 36493541 ; 36493701 ; 364D / ;
Abstract

An information handling systems capable of transferring data among various system resource devices such as input/output (I/O) devices and a system memory includes a first bus coupled to the system memory, a second bus coupled to the system resource devices, and a bus interface unit (BIU) coupled between the first bus and the second bus. Each of the system resource devices is capable of controlling the second bus after arbitrating therefor. The BIU includes a buffer for temporary storage of data being transferred between the first bus and the second bus, and control logic for generating a lock control signal, after one of the system resource devices has gained control of the second bus by arbitration, to gain control of the first bus to prevent other system resource devices from accessing the first bus. The control signal is dynamically generated by the BIU based on programmable conditions relating to the data transfer, thus optimizing data transfers between the first bus and the second bus. The control signal may act as an override to the normal memory controller arbitration scheme to prioritize access of the system resource devices to the system memory.


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