The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 06, 1996
Filed:
Oct. 11, 1994
Nippon Telegraph and Telephone Corporation, Tokyo, JP;
Abstract
In a pin-board matrix switch X- and Y-direction patterns are arranged in the X and Y directions to constitute a matrix. Crosspoint holes are formed at the crosspoints between the X- and Y-direction patterns. Each crosspoint hole has contacts formed therein. The contacts are connected to the patterns. A connecting pin has contact springs. The connecting pin is selectively inserted into the crosspoint holes to electrically connecting the contacts of the X-direction patterns and the Y-direction patterns which are adjacent to each other in the Z direction. Insulating members are arranged between the X- and Y-direction patterns. At least one pair of the X-direction patterns and the Y-direction patterns is constituted by first and second wiring layers arranged in the Z direction via insulating members. The two wiring patterns include cut portions, formed at corresponding positions, for dividing each of the first and second wiring patterns into two divided wiring portions, and conductor portions for connecting one divided wiring portion of the first wiring layer to the divided wiring portion of the second wiring layer which faces the divided wiring portion of the first wiring layer along the wiring direction and the other divided wiring portion of the first wiring layer to the remaining divided wiring portion of the second wiring layer.