High voltage tolerant cmos input/output circuit

Abstract

An input/output circuit communicates an external input signal to an internal signal and converts an internal signal to an external output signal. In one embodiment, the input/output circuit has a power supply terminal, and an input terminal that is coupled to an output terminal via a conductor. A pull-up circuit is coupled to the power supply terminal and the conductor, and includes a PMOS transistor having an N-well, where the pull-up circuit is configured to selectively pull-up the output signal. A pull-down circuit is coupled to a ground terminal and the conductor, and is configured to selectively pull-down the output signal. A comparison and logic control circuit is coupled to the power supply terminal and to the conductor, and is configured to compare a supply voltage level to the input signal and is configured to generate an affirmative logic signal when the input signal is greater than the supply voltage level and to generate a negative logic signal when the input signal is less than the supply voltage level. An N-well control circuit is coupled to the power supply terminal, to the conductor and to the pull-up circuit, where the N-well control circuit is responsive to the logic signal, and is configured to output a control N-well signal to control the PMOS transistor N-well voltage.