The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 1996

Filed:

Sep. 07, 1995
Applicant:
Inventor:

Hiroki Shirai, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ; H01L / ;
U.S. Cl.
CPC ...
36518501 ; 36518524 ; 36518526 ; 36518529 ; 437 43 ;
Abstract

Disclosed is an electrically erasable nonvolatile semiconductor memory device having a floating gate electrode formed on a semiconductor substrate through a first gate insulating film, a control gate electrode formed on the floating gate electrode through a second gate insulating film, and source and drain regions spaced apart from each other under the floating gate electrode so as to partially overlap the floating gate electrode, wherein an electric field buffering means for relaxing an electric field generated between a peripheral portion of an element isolation region and an end portion of the floating gate electrode in application of an erase voltage is selectively formed as a lightly doped region in a source region surface portion of the peripheral portion of the element isolation region.


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