The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 30, 1996
Filed:
Oct. 28, 1994
Takashi Mihara, Saitama Pref., JP;
Hitoshi Watanabe, Tokyo, JP;
Hiroyuki Yoshimori, Kanagawa Pref., JP;
Carlos A Paz de Araujo, Colorado Springs, CO (US);
Larry D McMillan, Colorado Springs, CO (US);
Symetrix Corporation, Colorado Springs, CO (US);
Olympus Optical Co., Ltd., Tokyo, JP;
Abstract
A non-volatile integrated circuit memory in which the memory cell includes a first transistor gate overlying a first channel region, a ferroelectric material overlying a second channel region, and a second transistor gate overlying a third channel region. The channel regions are connected in series, and preferably are contiguous portions of a single semiconducting channel. The firm channel is connected to a plate voltage that is 20% to 50% of the coercive voltage of the ferroelectric material. A sense amplifier is connected to the third channel region via a bit line. The rise of the bit line after reading a logic '1' state of the cell is prevented from disturbing the ferroelectric material by shutting off the third channel before the sense amplifier rises.