The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 1996

Filed:

Oct. 31, 1994
Applicant:
Inventor:

N Deepak Swamy, Austin, TX (US);

Assignee:

Dell USA, L.P., Austin, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H05K / ;
U.S. Cl.
CPC ...
174260 ; 174261 ; 361767 ; 361760 ; 361808 ; 439 83 ; 257734 ; 257739 ; 29840 ;
Abstract

A printed circuit board is provided having one or more lands formed upon the outer surface of the printed circuit board. Each land is adapted to receive a surface mount component and, specifically, leads extending from the surface mount component. Each land is fabricated having an inwardly facing exposed surface which, when the lead is placed upon the land, directs or channels the lead toward the center of the land to enhance interconnect accuracy of the lead to the land. Moreover, various configurations of solder are placed upon the land, wherein the solder can be deposited at select regions on the land or at a controlled thickness. Careful placement of solder helps ensure the lead, once placed, will not migrate or misalign from the land during subsequent reflow. Careful placement of solder helps minimize surface tension imbalance of the molten solder by assuring surface migration in a controlled direction to the middle of the land.


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