The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 23, 1996

Filed:

Jan. 26, 1995
Applicant:
Inventor:

Azuma Suzuki, Toyko-to, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365200 ; 36523003 ;
Abstract

The redundancy circuit device includes a main word line 1 for selecting a first memory area and a subsidiary word line 2, and a spare subsidiary word line 4 for selecting a second memory area (in which spare memory cells are arranged). In case a defective memory cell exists in the first memory cell area, the address is programmed by a redundancy program circuit 14 of a redundancy circuit 41 (provided for each section) of a section decoder 42. Further, when a row partial signal outputted from a row partial decoder 13 hits a defective memory cell, the spare subsidiary word line 4 is selected through the redundancy program circuit 14 to select the spare memory cell, without selecting the subsidiary word line 2. In a memory device of double word line system, a defective memory cell can be replaced with a spare memory cell in unit of each of a plurality of the subsidiary word lines connected to the main word line, thus improving the redundancy efficiency and thereby increasing the production yield of the memory chip.


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