The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 23, 1996
Filed:
Sep. 30, 1994
Fumio Murabayashi, Ibaraki-ken, JP;
Takashi Hotta, Hitachi, JP;
Masahiro Iwamura, Hitachi, JP;
Akiyoshi Osumi, Hitachi, JP;
Hitachi, Ltd., Tokyo, JP;
Abstract
A carry propagating device, provided on a single substrate, is constituted by groups of first and second MOS transistors, a third MOS transistor, a bipolar transistor and first and second impedance elements. An output of the carry propagating device is provided at the collector of the bipolar transistor and is connected to a first power supply terminal through the first impedance element, the emitter is connected to a second power supply terminal through the second impedance element, and the base is connected to a fixed potential source. The first MOS transistors are connected in series between the emitter of the bipolar transistor and the second power supply terminal through the third MOS transistor controlled by a carry signal. As to the second MOS transistors, one is connected in parallel to the second impedance element and each of the remaining ones is connected between a common connection of a respective pair of adjacent ones of the series-connected first MOS transistors and the second power supply terminal. There is thus effected a speed-up of the carry signal and thereby a speeding-up of the signal processing. There is also provided a wiring scheme for preventing noise interference between different wirings. Moreover, a device has been schemed for a plurality of logic circuit blocks and including a data signal path for interconnecting different logic circuit blocks and facilitating the interfacing of a current-driven signal.