Metal programmed transistor array

Abstract

A semi-conductor device has a substrate with an oxide layer thereover. Within the oxide layer are a plurality of rows of polycrystalline material which represent the rows in the transistor array. Over the top of the oxide material are a plurality of columns of metal areas which represent the columns of the transistor array. Below each intersection of a metal layer and a gate layer are contact areas in the substrate which align with the gate to form a transistor within the semi-conductor device. The source implant for all transistors are connected to ground. The drain implant of each transistor is connected to the metal layer above through a window in the oxide material only if a transistor is required at the specific row and column intersection for a specific pre-programed memory. By forming an array of transistors and controlling the use of a transistor at specific row and column intersections by controlling whether the column connects electrically with the drain implant of the transistor, the mask changes are performed at a later stage in the manufacturing process. Mask changes are performed for connection of transistors in the contact windows etching mask, leaving fewer steps for completion of the semi-conductor from customizing the design to unique customer requirements.