The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 23, 1996

Filed:

Apr. 10, 1995
Applicant:
Inventors:

John J DeMarco, East Brunswick, NJ (US);

Robert L Kostelak, Jr, Bernardsville, NJ (US);

Assignee:

AT&T Corp., Murray Hill, NJ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G03F / ;
U.S. Cl.
CPC ...
430-5 ; 430 22 ; 430322 ; 430324 ; 356399 ; 356401 ;
Abstract

A phase-shifting optical lithographic mask is made by a method that produces a set of phase shifting features (11) located in phase-shifting areas and a set of reinforced alignment marks (13, 33) located in alignment areas of the mask. Both of these sets are located on a single slab of quartz (10). The method involves a lift-off step that results in the self-alignment of the alignment marks with respect to the phase-shifting features. All of the phase-shifting features together with all of the alignment marks are patterned during a single step, and all of them comprise a bottom layer (11) of common material and common thickness so as to be partially transparent to optical radiation used in an optical lithographic system. Typically the bottom layer is essentially chromium oxynitride. In order to suppress optical radiation leakage from the phase-shifting features to the alignment mark areas, a reinforced alignment-mark shutter layer (12, 32) is located between the reinforced alignment marks and the phase-shifting areas, and it is made simultaneously with the reinforced alignment marks. And in order to suppress optical radiation leakage from one chip area to another chip area, both located on a single wafer, a reinforced chip shutter layer (14, 34) is also made simultaneously with the reinforced alignment marks and is located between chip areas.


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