The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 16, 1996
Filed:
Dec. 15, 1993
Joseph P Bratt, San Jose, CA (US);
John Brennan, Mountain View, CA (US);
Peter Y Hsu, Fremont, CA (US);
Chandra S Joshi, Saratoga, CA (US);
William A Huffman, Los Gatos, CA (US);
Monica R Nofal, Los Altos, CA (US);
Paul Rodman, Palo Alto, CA (US);
Joseph T Scanlon, Sunnyvale, CA (US);
Man K Tang, Milpitas, CA (US);
Silicon Graphics, Inc., Mountain View, CA (US);
Abstract
A processor system that is switchable between a normal mode of operation without precise floating point exceptions and a debug mode of operation with precise floating point exceptions. The processor system includes a dispatch for dispatching integer and floating point instructions, an integer unit having a multi-stage integer pipeline for executing the integer instructions, and a floating point unit having a multi-stage floating point pipeline for executing the floating point instructions. The system begins operation in the normal mode, and upon receipt of an instruction to 'switch to debug mode,' the processor switches to the debug mode of operation with precise exceptions. In the debug mode, once a floating point instruction has been dispatched, all other instructions are prevented from being committed until the system determines whether the floating point instruction generates an exception. Thus, permitting the system to signal precise exceptions when not in the normal mode.