The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 16, 1996
Filed:
Jun. 30, 1994
Applicant:
Inventors:
Assignee:
PMC-Sierra, Inc., , CA;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L / ;
U.S. Cl.
CPC ...
326-8 ; 326 16 ; 326 93 ; 380-4 ; 327142 ;
Abstract
A design protection circuit for a logic circuit comprised of a counter for receiving clock pulses with the logic circuit and apparatus for resetting the logic circuit upon the counter counting a predetermined number of clock pulses, the predetermined number being higher than a highest number of clock pulses required by the logic circuit for carrying out a simulated logical function.
Smith, Graham. (1996). Method for protecting an asic by resetting it after a predetermined time (U.S. Patent No. 5537055). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5537055
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