The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 16, 1996
Filed:
Jun. 13, 1995
Applicant:
Inventor:
Takeo Muragishi, Hyogo, JP;
Assignee:
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
257 69 ; 257 67 ; 257 72 ; 257 74 ; 257351 ; 257354 ;
Abstract
A p-well region is formed in a main surface of a semiconductor substrate. A contact electrode is electrically connected to a predetermined n-type impurity region formed in a surface of the p-well region. A diffusion preventing layer is formed between the contact electrode and a drain region of a TFT. An interconnection layer is formed on the semiconductor substrate with an interlayer insulating film therebetween. A diffusion preventing layer is also formed between the interconnection layer and a source region of the TFT. Diffusion preventing layers are further formed between a channel region of the TFT and the source/drain regions of the TFT.