The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 16, 1996

Filed:

Oct. 28, 1994
Applicant:
Inventors:

Michael S Liu, Bloomington, MN (US);

Ka-Lun Lo, New Hope, MN (US);

Kalluri R Sarma, Mesa, AZ (US);

Assignee:

Honeywell Inc., Minneapolis, MN (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
257 59 ; 257 72 ; 257 91 ; 257 99 ; 359 59 ; 359 88 ;
Abstract

A transistor panel used for active matrix display devices includes islands of single crystal silicon formed on a transparent quartz substrate and arranged in rows and columns, with an NMOS transistor formed in each island. Each transistor includes source, drain and channel regions and an isolated pixel reference voltage region. A silicon body tie connects the channel region to the pixel reference voltage region and acts as a current sink for unwanted carriers thereby greatly increasing the snapback voltage. A metallization extends to each transistor and is in contact with each reference voltage region to form a body tie buss. The portion of the body tie that overlaps the pixel electrode may be sized to provide a storage capacitor for improved display performance. The unique body tie design obviates the need for a separate light shield layer, provides a dramatically increased aperture ratio and is compatible with normal high temperature silicon processes.


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