The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 02, 1996
Filed:
Jul. 19, 1994
Louis H Liang, Los Altos, CA (US);
Other;
Abstract
Methods and specially adapted reusable test carriers provide for burn-in test of semiconductor integrated circuit devices and economical production of known good dice (KGD). Methods for temporary flip-chip mounting of IC wafers or dice use a hierarchy of solder melting points in combination with improved reusable carrier substrates. IC chip wafers having high-melting-temperature flip-chip terminals are coated with a predetermined volume of a sacrificial solder having a significantly lower melting temperature. A reusable temporary carrier is provided, in a range of sizes adapted for a wafer, small numbers of IC dice, or an individual die, For full-wafer burn-in, the reusable carrier has edge connector terminals. For testing individual dice or a small number of dice, the reusable carrier has conductive elements in a pattern matching each IC dies terminal pattern. The same or opposite side of the reusable carrier has pins or ball-grid array matching a conventional burn-in socket. A preferred reusable carrier consists of separable parts: a substrate customized to carry specific dice for burn-in, and a 'universal' carrier package adapted to fit standard test sockets. After burn-in testing, the known good dice are removed by a low-temperature reflow, and attached to permanent substrates by conventional high-temperature reflow. The test carriers are re-usable after cleaning. A carrier structure similar to the preferred separable structure is specially adapted for testing and/or permanent packaging of IC chips which utilize wire-bond connections.