The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 02, 1996
Filed:
Oct. 03, 1994
Raymond A Fillion, Niskayuna, NY (US);
Eric J Wildi, Niskayuna, NY (US);
Charles S Korman, Schenectady, NY (US);
Sayed-Amr El-Hamamsy, Schenectady, NY (US);
Steven M Gasworth, Glenville, NY (US);
Michael W DeVre, Scotia, NY (US);
James F Burgess, Schenectady, NY (US);
General Electric Company, Schenectady, NY (US);
Abstract
Power semiconductor device structures and assemblies with improved heat dissipation characteristics and low impedance interconnections include a thermally-conductive dielectric layer, such as diamondlike carbon (DLC) overlying at least portions of the active major surface of a semiconductor chip, with vias formed in the dielectric layer in alignment with contact pads on the active major surface. A patterned metallization layer is formed over the thermally-conductive dielectric layer, with portions of the metallization layer extending through the vias into electrical contact with the chip contact pads. A metal structure is electrically and thermally coupled to selected areas of the patterned metallization, such as by solder bonding or by a eutectic bonding process. In different embodiments, the metal structure may comprise a metal conductor bonded to the opposite major surface of another power semiconductor device structure, a heat-dissipating device-mounting structure, or simply a low-impedance lead.