The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 02, 1996
Filed:
May. 18, 1994
Mark A Fodor, Los Gatos, CA (US);
Craig A Bercaw, Sunnyvale, CA (US);
Charles Dornfest, Fremont, CA (US);
Applied Materials, Inc., Santa Clara, CA (US);
Abstract
A susceptor or other semiconductor wafer processing and/or transfer support platform includes a surface pattern having two or more regions of high and low elevation. The regions of high and low elevations can be rectangular/square dimpled patterns having tops coplanar with one another to support a semiconductor wafer for processing. The high and low regions can also be a wave form appearing to emanate from a point, where each of the wave crests form an imaginary plane on which a wafer to be processed can rest. The combination of high and low regions increases the average spacing between the wafer and the susceptor and reduces or eliminates the capacitive coupling (or sticking force) between processing hardware and a substrate (wafer) created by electrical fields during processing. The dimpled patterns are created by machining and can be created by using chemical and electrochemical etching of the wafer handling surfaces of processing hardware pieces.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile