The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 1996

Filed:

Aug. 30, 1993
Applicant:
Inventor:

Mitchell A Stones, Phoenix, AZ (US);

Assignee:

VLSI Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
395494 ; 395432 ;
Abstract

The amount of user configuration required for a programmable DRAM interface controller is minimized while assuring adherence to DRAM signal specifications and providing improved DRAM memory transfer performance using a novel intelligent programmable DRAM interface controller which allows programming of TRAS, TRP, TRCD, TCP, TCAS and TCST in units of the cpu clock/2 while obtaining TCSH and TRSH specifications without explicitly programming these parameters. THE TCSH specification is accomplished by holding CAS from deasserting until RAS has deasserted or until the RAS programmed low time has been met. The TRSH specification is accomplished by holding RAS asserted in all normal read or write accesses for at least one time unit after CAS has been asserted, which, in a majority of CPU/DRAM Systems, insures that the DRAM limitation TRSH is satisfied.


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