The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 1996

Filed:

Aug. 12, 1994
Applicant:
Inventors:

Robert E Busch, Essex Junction, VT (US);

Endre P Thoma, Colchester, VT (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
395477 ; 395312 ; 395476 ; 395478 ; 395495 ; 3642436 ; 36492692 ; 364959 ; 364D / ; 36518902 ; 36523002 ; 36523003 ; 36528006 ;
Abstract

In one aspect a memory bank selection system includes two asynchronous RAS pins and a single CAS pin, a switching circuit for each memory bank and a bank address decoder with an output to each switching circuit. The RAS pins are available to all of the switching circuits. A given switching circuit selects its associated bank if an active RAS signal is present and the bank address decoder output was sent thereto. The number of memory banks that can be simultaneously active directly depends on the number of RAS inputs. In another aspect, the number of CAS pins is equal to the number of asynchronous RAS pins.


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Busch, Robert. (1996). Method and apparatus for multiple memory bank selection (U.S. Patent No. 5530836). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5530836

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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