The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 25, 1996
Filed:
Apr. 04, 1994
Chih-Jiu Peng, Austin, TX (US);
Paul C Rossbach, Austin, TX (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
A CAM/SRAM structure (42) performs address translations of variable length blocks, a 'block address translator.' Each address translation is stored in a register broken into an upper half and a lower half. The upper half contains CAM bit cells (56) which match an input effective address to a stored tag (BEPI) alternating with SRAM bit cells which store a block length tag (BL). The block length tag defines the length of the translated block and, hence, the number of bits which must match between the input effective address and the stored tag. The lower half contains SRAM bit cells which store a real address associated with the tag (BRPN) alternating with multiplexer circuits. In the event of a CAM match, each multiplexer circuit outputs either a real address bit or an input effective address bit, depending upon the block length tag. The two halves of each register are fabricated adjacent to each other in parallel rows to minimize routing requirements and reduce overall circuit capacitance.