The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 25, 1996
Filed:
Jul. 26, 1994
Keiji Tanabe, Tokyo, JP;
Ando Electric Co., Ltd., Tokyo, JP;
Abstract
A physical image converting circuit is used in a memory tester for or an integrated circuit tester analyzing the failure of storage devices to be measured, in which data are read as logical images from each of the corresponding storage regions to each input/output bit and are stored in each of the corresponding storage regions to each input/output bit of a failure analysis memory used for failure analysis. The physical image converting circuit converts the logical image of the readout data from the failure analysis memory into physical images so that the readout data corresponds to a physical position on a wafer chip of the failure analysis memory. The physical image converting circuit includes a counter, an address converting circuit, a failure analysis memory, and a selector. The counter generates increment addresses corresponding to at least a storage capacity of failure analysis memory. The address converting circuit generates data X and Y for specifying X and Y addresses and data P for specifying the input/output bit of the failure analysis memory based on the increment addresses. The selector selects the specified data by the data P among the readout data from the corresponding storage region of the failure analysis memory to the specified X and Y addresses by the data X and Y.