The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 18, 1996

Filed:

Nov. 12, 1993
Applicant:
Inventor:

Dan Agiman, Rosh Haain, IL;

Assignee:

Linfinity Microelectronics, Inc., Garden Grove, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
327374 ; 327 87 ; 327111 ; 327483 ; 327377 ; 326 17 ;
Abstract

A bi-mode circuit for driving an output load selectively couples the output load to a supply voltage source or to a low discharge voltage source such as ground using switches which are controlled by an input buffer in response to an input signal. A high input signal closes a first switch to provide a biasing current to first and second current amplifiers to turn on a first output transistor which couples the output load to the low reference voltage to discharge the output load. Conversely, a low input signal closes a second switch to provide the biasing current to a third current amplifier to turn on a second output transistor which couples the output load to the supply voltage source. When the input signal becomes high, rapid pulldown of a capacitive output load is achieved using a high internal pre-drive current provided by the first and second current amplifiers, in a first mode of operation. As the output voltage decreases, turnoff of the first output transistor is prevented by switching to a second mode when the output voltage drops below a threshold value as determined by a comparator. The comparator effectively closes a third switch and thereby a loop which bypasses the first current amplifier to prevent the drive current from escaping the first current amplifier, so that the second current amplifier continues to amplify the biasing current to maintain the first output transistor on.


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