The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 1996

Filed:

Nov. 17, 1994
Applicant:
Inventor:

Walter Cerutti, Ivrea, IT;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395496 ; 39542101 ; 39542107 ; 364D / ;
Abstract

A memory addressing device for data processing apparatus addresses in sequence and in a burst a series of memory locations in a single addressing period of a central processing unit. The device comprises enabling circuits to set a central processing unit (CPU) to a burst transfer cycle and to keep a memory control unit (MCU) in a waiting state during the burst transfer. An address generator circuit is capable of generating in sequence a series of memory address codes to address a series of locations in the memory (RAM) during the burst transfer cycle. A multiplexer circuit sends to the memory either the address code of the address generator or that of the memory control unit during the burst cycles and the normal cycles respectively. The device is particularly suitable for use in personal computers with high data transfer rates.


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