The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 11, 1996
Filed:
Nov. 01, 1994
Akio Kawamura, Nara, JP;
Sharp Kabushiki Kaisha, Osaka, JP;
Abstract
A semiconductor device which comprises plural memory cells, said memory cell comprising: a flip-flop circuit including a pair of drive transistors each having a gate, a gate oxide film and source/drain regions, and a pair of load TFTs connected to said pair of drive transistors, each of said load TFTs having a gate electrode, a gate oxide film and an active layer including source/drain regions all of which are deposited sequentially in that order; and a pair of access transistors connected to said flip-flop circuit; wherein either one of the source/drain regions of said each TFT is connected to at least either one drive transistor at either one of the source/drain regions thereof or the other drive transistor at the gate thereof via a semiconductor pad, and the other of the source/drain regions of the TFT is connected to a wiring layer via a semiconductor pad; and at least surface layer of said semiconductor pad has the same conductivity type as that of the source/drain regions of the TFT.