The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 1996

Filed:

Oct. 26, 1993
Applicant:
Inventors:

Patrizio Vinciarelli, Boston, MA (US);

Fred Finnemore, No. Reading, MA (US);

John S Balog, Mendon, MA (US);

Brant T Johnson, Concord, MA (US);

Assignee:

VLT Corporation, San Antonio, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K / ;
U.S. Cl.
CPC ...
361740 ; 174 505 ; 174 522 ; 361728 ;
Abstract

A package for electrical components in which a circuit board holds the components. The package includes an enclosure having generally parallel, spaced apart upper and lower internal surfaces. The circuit board lies generally parallel to the lower internal surface with the electrical components held in an internal-space between the circuit board and the upper internal surface. Conductive terminal pins extend from outside the enclosure into the internal space. The terminal pins are connected to the circuit board by conductive links, each link having an end attached to the periphery of the circuit board and another end projecting into the internal space. In other aspects, a resilient non-compressive encapsulant is used to fill a space within the package; an electronic component is mounted with a power-dissipating device sitting in the aperture of a circuit board, a power-dissipating surface in contact with a baseplate, and contact pads electrically connected to the circuit board; terminal pins are connected to a circuit board using a fence connected at the periphery of the circuit board, the fence extending substantially perpendicularly to the circuit board, the fence comprising at least two conductive links joined by a severable junction.


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