The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 04, 1996
Filed:
Apr. 28, 1995
Applicant:
Inventor:
Florin Gheorghiu, San Jose, CA (US);
Assignee:
Rolm Company, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395650 ;
Abstract
Method and apparatus for rapidly configuring several field programmable gate arrays ('CFPGAs'), some of which FPGAs are of different sizes. In accordance with the present invention, the configuration is provided to each FPGA in parallel, on a bit-wise basis. Further, the different sizes of FPGA are accommodated by utilizing dummy bits in the configuration data. Still further, the configuration process can be completed at different times, i.e., the completion times of the configuration process can be staggered, by use of dummy bits in the configuration data.