The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 04, 1996
Filed:
Oct. 27, 1993
Yuji Sato, Machida, JP;
Katsunari Shibata, Tokyo, JP;
Takahiro Sakaguchi, Akishima, JP;
Mitsuo Asai, Kokubunji, JP;
Masashi Hashimoto, Mitaka, JP;
Hiroshi Takayanagi, Kokubunji, JP;
Tatsuo Okahashi, Sayama, JP;
Keiji Moki, Tachikawa, JP;
Yoshihiro Kuwabara, Iruma, JP;
Tatsuo Ochiai, Kodaira, JP;
Masaru Ohki, Tokorozawa, JP;
Hisao Ogata, Kokubunji, JP;
Hitachi, Ltd., Tokyo, JP;
Hitachi Micro Computer System, Ltd., Tokyo, JP;
Abstract
A general neuro-computer and system using it is capable of executing a plurality of learning algorithms, providing an instruction execution speed comparable with a hard wired system, and practically neglecting a time required for rewriting microprograms. The neuro-computer is constituted by a neuron array having a plurality of neurons, a control storage unit for storing microinstructions, a parameter register, a control logic, and a global memory. A host computer as a user interface inputs information necessary for the learning and execution of the neuro-computer to the system, the information including learning algorithms, neural network architecture, the number of learnings, the number of input patterns, input signals, and desired signals. The information inputted from the host computer is transferred via a SCSI to the neuro-computer to perform a desired neural network operation.