The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 1996

Filed:

Jan. 28, 1994
Applicant:
Inventors:

Hiroyuki Sato, Kawasaki, JP;

Jinichi Yoshizawa, Kawasaki, JP;

Hiroomi Tateishi, Kawasaki, JP;

Haruo Yamashita, Kawasaki, JP;

Junichi Tamura, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G04C / ; H03K / ; A03K / ;
U.S. Cl.
CPC ...
368 46 ; 327152 ; 327237 ; 327258 ; 327295 ;
Abstract

Disclosed is a clock distributing apparatus for distributing clock signals with a desired phase to each of devices provided between a clock generating section (10) for generating clock signals and a plurality of devices (30) for receiving the clock signals. A delay generating section (21) generates a plurality of delay clock signals by imparting a plurality of delay quantities to the clock signals from the clock generating section. A clock distributing section (22) has a plurality of input terminals corresponding to the plurality of delay clock signals and a plurality of output terminals corresponding to the respective devices. The clock distributing section (22) distributes desired delay clock signals to one or more output terminals by selecting the input terminals corresponding to the desired delay clock signals.


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