The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 1996

Filed:

Aug. 30, 1993
Applicant:
Inventors:

Jae G Jeong, Kyoungki-do, KR;

Jae C Om, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 44 ; 437 37 ; 437 29 ;
Abstract

This invention relates to a method of manufacturing a MOSFET with LDD regions, high integrated semiconductor, wherein a photoresist pattern for a source/drain implant mask is formed to sufficiently cover the part where the edge between field oxide layer and LDD regions are crossed. As a result, at the place damaged from the formation of spacer at the side wall of gate electrode, high concentrated impurity should not be implanted so as to form the source/drain region within LDD regions. Consequently, this invention prevents the weakening of breakdown voltage or increase of leakage current.


Find Patent Forward Citations

Jeong, Jae. (1996). Method of manufacturing a mosfet with ldd regions (U.S. Patent No. 5523250). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5523250

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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