The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 28, 1996

Filed:

May. 09, 1994
Applicant:
Inventor:

Benny Madsen, Santa Clara, CA (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03D / ;
U.S. Cl.
CPC ...
375375 ; 375376 ; 327156 ;
Abstract

A phase-lock loop (PLL) includes a switch for opening the loop (e.g. for direct modulation of its voltage-controlled oscillator (VCO) during transmission of an intermittent signal such as data bursts) and has a phase comparator which can be selectively initialized (e.g. by setting to a programmed value or resetting to zero or terminal count value the reference and/or feedback signal frequency dividers) so that upon 're-closing' of the loop the PLL will achieve phase-lock within a predetermined amount of time. When the loop is opened, the VCO's dc ('phase-lock') control voltage can be maintained so as to help ensure that phase-lock will be achieved within the desired amount of time.


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