The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 28, 1996

Filed:

Aug. 09, 1994
Applicant:
Inventor:

Yoshiharu Aimoto, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36523005 ; 365227 ; 36523003 ; 36523009 ; 365240 ; 36518912 ;
Abstract

In a semiconductor memory device comprising a plurality of memory cells which are arranged on a cell area defined by a first number of column signal lines and a second number of row signal lines, a row decoder produces a row selection signal through one of the second number of row signal lines. A serial access section includes a data register and serially accesses a part of the plurality of memory cells arranged along the one end of the second number of row signal lines. The plurality of memory cells are divided into a plurality of cell blocks. The data register is divided into a plurality of subword data registers each of which corresponds to each of the plurality of cell blocks. The serial access section accesses the plurality of cell blocks, in order, at a predetermined interval. Each of the plurality of subword data registers stores subword data in each of the plurality of cell blocks, in order, at the predetermined interval.


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