Signal synchronized digital frequency discriminator

Abstract

A digital frequency discriminator processes input pulses including first and second time separated input pulses to determine if the frequency of any two sequential pulses lie within a predetermined frequency band with upper and lower frequency limits and that they are received for at least a predetermined period of time. A delay timer is coupled to sense the input pulse stream and operates in a pulse sensing standby mode prior to receipt of the first input pulse. Upon receipt of the first input pulse, the delay timer switches into a time-limited active mode to define a fixed duration delay interval having a duration equal to the period of the upper frequency limit of the frequency band. The delay timer switches back into the pulse sensing standby mode upon completion of the delay interval. A gate timer is coupled to the output of the delay timer and switches from a standby mode into a time-limited active mode upon completion of the delay interval to define a fixed duration bandwidth interval. A monitoring circuit includes a first input coupled to monitor the input pulse stream and a second input coupled to monitor the output of the gate timer. The monitoring circuit generates a frequency coincidence signal when the second input pulse is received during the bandwidth interval to indicate that the frequency of the input pulse lies within the predetermined frequency band. A recognition circuit is coupled to monitor the output of the coincidence detector to ensure that the coincidence signal is received for at least a predetermined period of time.