The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 1996

Filed:

Apr. 11, 1994
Applicant:
Inventors:

Kevin M Ovens, Garland, TX (US);

Alan S Bass, Plano, TX (US);

Jay A Maxey, Garland, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
3241581 ; 324716 ; 324719 ;
Abstract

A process variance detection technique for detecting fabrication processing variances in integrated circuit components, such as resistors or MOSFETs, is based on the decreased sensitivity to processing variations exhibited by components that are up-sized relative to similar components with nominal dimensions. Detection circuitry includes detection components with both nominal and up-sized dimensions, and variance detection involves detecting the differences in operational response of the nominal and up-sized detection components. For bipolar logic, resistors are fabricated with up-sized widths, while for MOS logic, MOSFETs are fabricated with up-sized gate lengths.


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