The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 1996

Filed:

Nov. 30, 1994
Applicant:
Inventors:

Dieter E Ast, Ithaca, NY (US);

William Edwards, Ithaca, NY (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437160 ; 437131 ; 437952 ;
Abstract

Low resistance contacts for microelectronic devices such as field effect transistors are formed by defining an area on a face of a semiconductor substrate, and forming a layer of an alloy on the defined area wherein the alloy comprises a first material and a second material which may be separated by a segregating step. By doping the alloy layer, a diffusion step may be used to form shallow doped regions in the semiconductor substrate. The alloy is segregated thereby forming a first layer comprising the first material on the defined area, and a second layer comprising the second material. In a preferred embodiment, the alloy comprises a compound of silicon and germanium. The alloy may be segregated by oxidizing the silicon thereby forming a first layer of germanium and a second layer of silicon dioxide. The germanium has a low bandgap thereby providing a low resistance contact to the silicon substrate. Accordingly, a low resistance contact on a shallow doped portion of a semiconductor substrate is provided.


Find Patent Forward Citations

Loading…