The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 07, 1996

Filed:

Mar. 15, 1994
Applicant:
Inventors:

Joannes M Sevenhans, Brasschaat, BE;

Mark G Van Paemel, Zoersel, BE;

Assignee:

Alcatel N.V., Rijswijk, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F / ; H03F / ;
U.S. Cl.
CPC ...
323315 ; 323312 ; 330288 ; 330257 ;
Abstract

A differential pair arrangement is disclosed which includes between the poles of a DC supply source the series connection of two parallel first branches and a common second branch. Each first branch includes the series connection of a first impedance Q2, Q3, RL/ Q2', Q3', RL', a main path of a transistor Q1/ Q1'and a second impedance RE/RE', the control electrodes of transistors Q1/ Q1' constituting respective input terminals IN1/ IN2 of the arrangement. The second branch includes a first current source (CCS). The arrangement further includes two third branches between the DC supply source poles, each consisting of the series connection of a second current source ICS/ICS', a respective transistor main path and a resistive impedance means R11, S11, R12, S12/ R11', S11', R12', S12'. These third branches result in an increased DC current through the corresponding transistor, thereby increasing the linearity of the arrangement, whilst the DC current through the first and second impedances does not increase, thereby not increasing the needed supply voltage nor the offset voltage of the arrangement.


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