The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 1996

Filed:

Mar. 29, 1994
Applicant:
Inventors:

Noriaki Oishi, Kanagawa, JP;

Markus H Veltman, Tokyo, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11B / ;
U.S. Cl.
CPC ...
369 59 ; 369 48 ; 369 49 ; 369 60 ; 360 191 ; 360 20 ; 360 29 ; 360 39 ;
Abstract

A multiplexed data stream is formed by encoding a first input signal at a variable bit rate to form a first encoded data signal which is temporarily stored in a first storage device, encoding a second input signal at a constant bit rate to form a second encoded data signal which is temporarily stored in a second storage device, and using a multiplexing circuit to multiplex the first and second encoded data signals respectively stored in the first and second storage devices to form the desired multiplexed data stream. Transfer of the first encoded data signal from the first storage device to the multiplexing circuit is controlled on the basis of a quantity of the first encoded data signal that is present in the first storage device. When none of the first encoded data signal is present in the first storage device, transfer of the first encoded data signal to the multiplexing circuit is temporarily halted. A switching device is switched at fixed time intervals, on the basis of a quantity of the second encoded data signal that is present in the second storage device, between a first switch position at which the multiplexing circuit is connected to the first storage device and a second switch position at which the multiplexing circuit is connected to the second storage device.


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