Low power consumption type one-chip microcomputer having a plurality of

Abstract

A microcomputer includes a plurality of peripheral circuits accessed by a central processing unit for a reading/writing of the peripheral circuits. Each of the external terminals supplies a selection signal indicative of use or non-use of a corresponding peripheral circuit. Each selection signal is supplied to a gate circuit provided for the corresponding peripheral circuit, for controlling permission and inhibition of application of a clock signal or a strobe signal to the corresponding peripheral circuit. Thus, neither the clock nor the strobe signal is supplied to the peripheral circuits which are not used in an actual application system, with the result that a low power consumption, highly reliable microcomputer is realized.