The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 1996

Filed:

Jan. 18, 1994
Applicant:
Inventors:

Richard A Erhart, Chandler, AZ (US);

Thomas W Ciccone, Paradise Valley, AZ (US);

Assignee:

Vivid Semiconductor, Inc., Chandler, AZ (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01J / ; H01L / ; H03L / ; G09G / ;
U.S. Cl.
CPC ...
327530 ; 327535 ; 327537 ; 327538 ; 327566 ; 327333 ; 327108 ; 345204 ; 345211 ; 345212 ;
Abstract

An integrated circuit for driving an active or passive matrix liquid crystal display panel or the like provides an analog output signal which switches through a voltage range that exceeds the safe operating voltage of the CMOS transistors from which it is formed. Duplicate digital to analog conversion circuits are provided on the integrated circuit but are operated from two different power supply voltage ranges. Each voltage range has a magnitude less than the safe operating voltage. The analog output signals generated by the duplicate digital to analog conversion circuits are coupled to an output multiplexer that is responsive to a control signal for selecting one of the two analog output signals to the output terminal of the integrated circuit. The output multiplexer includes an n-channel pass transistor and a p-channel pass transistor coupled to the output terminal in parallel with each other and responsive to the control signal for passing one or the other of the dual analog signals to the output terminal. Exposure of the pass transistors to voltages exceeding the safe operating voltage is avoided by inserting shielding transistors in series therewith.


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