The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 23, 1996
Filed:
Jun. 08, 1994
Thomas E Orlowski, Fairport, NY (US);
Sophie V Vandebroek, Penfield, NY (US);
Xerox Corporation, Stamford, CT (US);
Abstract
A porous silicon Light Emitting Diodes (LEDs) device and method for fabricating LEDs with supporting circuits on a silicon chip or wafer for a Full Width Array in which a switch diode structure is used to form the porous silicon LED element and later drives the LED after the LED is fabricated. The LED is formed by defining an area in the switch diode for placing an LED element. Epi silicon is deposited in the defined area; and the epi silicon is electrochemical etched to produce porous silicon. This procedure creates column-like Si structures of nanometer dimension which can efficiently emit visible to infrared light at room temperature. Next, the porous silicon LED chip can be cut and butted without excessive damage. In this way, the chips bearing both LEDs and drive circuitry are made of silicon and can be cut and accurately butted by known techniques to form a low cost, high resolution Full Width LED array.