The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 09, 1996
Filed:
Jan. 11, 1995
Michael A Granato, Essex Junction, VT (US);
Gregory F Miceli, Poughkeepsie, NY (US);
Jerome R Relis, Monsey, NY (US);
Craig R Selinger, Spring Valley, NY (US);
Vernon L Watts, Poughkeepsie, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method for minimizing the time skew between signals traveling through various multi-cycle path nets linking one or several VLSI packages that includes a plurality of IC chips interconnected to each other. The method includes equalizing differences between the early and the late mode slack for each of the multi-cycle nets to decrease the joint probability of failure; maximizing the time balance between the early and the late mode slack; balancing over all the nets the difference between the early and the late mode slack, minimizing in the process statistical variations within the mode slack pair; and compensating for asymmetries between rising and falling switching times using the mode slack pair. The method allows multi-cycle path nets have their transmission line length confined between a maximum and a minimum length, which in turn minimizes the skew between signals in each of the nets, decreases cycle time and .improves the overall performance of the system.